Investigations on Multilevel and Surgeless Solid-State Circuit Breakers

Doctoral Candidate Name: 
Tiancan Pang
Electrical and Computer Engineering

The Solid-State Circuit Breaker (SSCB), as an emerging semiconductor-based circuit protection technology, is featured with its extremely fast fault interruption/isolation speed and regarded as a promising alternative to the electromechanical circuit breakers in the DC systems. However, in the conventional SSCBs, large surge voltages are clamped across their semiconductor switches when the breakers open and the dynamic voltage unbalance is incurred when the series-connected switches are used. With these technical defects, the efficiencies and reliabilities of the SSCBs are impaired and their wide adoption to the DC distribution systems is set back.

To overcome these technical limits of conventional SSCBs, four types of Multilevel and Surgeless Solid-State Circuit Breakers have been proposed in this dissertation. By utilizing the fast switching speeds of the semiconductor switches, the proposed SSCBs can commutate the fault current to the different conduction paths of the circuit breakers and attain significant benefits on efficiency and fault isolation speeds in comparison with the conventional SSCBs. Particularly, for the proposed Multilevel Solid-State Circuit Breaker (MLSSCB), the series-connected switches are clamped to their voltage dividing capacitors during their switching transience and then the dynamic voltage unbalancing issues among the switches can be averted. For the proposed surgeless SSCBs, with surge voltage suppressed, the semiconductor switches do not need to be overdesigned for the voltage ratings and the conduction efficiencies of the SSCBs can be improved on the ground that the semiconductor device with higher voltage block capability has thicker drift regions and larger on-state resistance. Derived from the integration of the Ground-Clamped Surgeless SSCB and the Multilevel SSCB, the proposed Surgeless Multilevel SSCB (SMLSSCB) can solve both the surge voltage and dynamic voltage unbalancing issues in the medium voltage DC SSCBs and attain higher efficiency and an ultra-fast isolation speed prior to the other SSCBs. A fault-tolerant configuration of the SMLSSCB has also been proposed to improve the reliability of SMLSSCB and make it prior to that of the conventional SSCBs.

In this dissertation, the operating principles of the proposed SSCBs have been presented. Besides, to demonstrate the proposed SSCBs’ advantages over the conventional SSCBs on fault isolation speeds, power efficiencies and reliability, the comparisons between the proposed SSCBs and their counterparts of the conventional SSCBs have been made in terms of several key parameters of the circuit breakers. Additionally, the simulation/experiment results and design considerations of the proposed circuit breakers have been introduced to validate their technical feasibilities and practical uses.

Defense Date and Time: 
Thursday, February 24, 2022 - 1:30pm
Defense Location: 
Committee Chair's Name: 
Dr. Madhav Manjrekar
Committee Members: 
Dr. Meera Sridhar, Dr. Sukumar Kamalasadan, Dr. Tiefu Zhao